www.des-ip-cores.com
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We place some of our publications, conference papers, and presentations below. All material will be accessible for downloading only for registered users. If you are not registered, please click here to register. |
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Books: |
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A. Melnyk. Computer Architecture. Lutsk, Lutsk regional publishers, 2008, -506 pp.
The book is published in Ukrainian language.
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V. Emets, A. Melnyk, R. Popovych. Information Protection in Computer and Telecommunication Networks. Main Cryptographic Algorithms. Lviv, BAK, 2003, -186 pp.
The book is published in Ukrainian language.
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T. Korkishko, A. Melnyk, V. Melnyk. Information Protection in Computer and Telecommunication Networks. Algorithms and Processors of Symmetric Block Encryption. Lviv, BAK, 2003, -169 pp.
The book is published in Ukrainian language.
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Journal papers: |
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A. Melnyk, Y. Morozov, V. Melnyk, T. Korkishko. Problems and Progress Trends in Information Protection // Journal of Kyiv Polytechnic University “Law, Normative and Metrological Provision of Data Protection System in Ukraine”, vol. 5, 2002, pp.158-162.
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(ukrainian)
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Conference papers: |
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V. Melnyk, A. Melnyk. IP Cores Generators in SoC Design // Proceedings of 5th International Conference for Students and Young Scientists “Telecommunication in XXI-th Century”. Wolka Milanowska, Poland, 24-26.11.2005, pp. 23-28. |
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V. Melnyk. Set of Symmetric Block Encryption Soft-Cores // Proceedings of the VII-th International Conference “The Experience of Designing and Application of CAD Systems in Microelectronics (CADSM) 2003”, February 18-22, 2003, Lviv-Slavsko. pp. 190-193. |
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V. Melnyk. Techniques of Configuring of the Symmetric Block Encryption Soft-Cores // Proceedings of the VII-th International Conference “The Experience of Designing and Application of CAD Systems in Microelectronics (CADSM) 2003”, February 18-22, 2003, Lviv-Slavsko. pp. 194-197. |
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CHAMELEON - ASIC Design Automatic Generation Environment |
INTRON announces a CHAMELEON - System-Level Design Solution for automatic generation of an ASIC design

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| New design technologies for high-performance reconfigurable hardware accelerators |
INTRON announces new design technologies for high-performance reconfigurable hardware accelerators

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| INTRON's new web address |
New web address for INTRON

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