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Our Inter-Core Communications IP Cores are intended to eliminate bottlenecks in the System-on-Chip integration. We have developed and are actually developing several dedicated IP Cores that can be used in SoCs with common internal communication channels or multiblock/multiport memory subsystem. These IP Cores have been created as sufficient auxiliary components of INTRON's SoCs. | ||
01. MBRC | Multiple-Block RAM Access Controller IP Core | download datasheet |