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INTRON offers a variety of products including System-Level Design Solutions, Image Processing Software Environments, and continually expanding sets of Intellectual Property (IP) Cores. Please select a category of your interest: |
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Remote monitoring tools |
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HealthSupervisor - continious remote health monitoring application. HealthSupervisor – app for remote monitoring condition of the health, namely lungs and heart. Monitor remotely the condition of other people's health or entrust the control of your health to professionals. |
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System-Level Design Solutions |
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CHAMELEON - ASIC Design Automatic Generation Environment CHAMELEON is the System-Level Design Solution developed by INTRON and intended for ASIC design automatic generation from the algorithm described on ANSI C language. The customer gets on return optimized VHDL RTL model which may be further synthesized using the FPGA design solutions. |
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OSCAR - Operative Synthesis of Computers from Algorithmic Representation The OSCAR is intended for the ASIC design automatic generation from the algorithmic representation. The developer, specifying an algorithm of the data processing on algorithmic representation, gets on return fully debugged and synthesizable VHDL model of the device that implements described algorithm. Obtained VHDL design may be further implemented in FPGA by any available FPGA design solution. |
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OCA - The Graphic System for Algorithm Structure Analysis and Processing The OCA enables obtaining different parallel forms of algorithms and their parameters and choosig the optimal one for the further application. The OCA environment performs analysis and gives possibility to effectively elaborate and modify algorithms structure. The results of the graphs processing are displayed on the screen as a corresponding algorithm flow graph, which can be saved in JPEG, BMP, PNG formats or in DOM format. |
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Intellectual Property Cores | |
Our IP Cores represent an outcome of joint effort of INTRON's researchers and engineers. New, and patented by INTRON, scientific solutions together with accuracy and professionalism of our engineers form the basis of design of our each IP Core. Check the links below to find out more. | |
Data Protection IP Cores; Fast Orthogonal Transformations IP Cores; Inter-Core Communications IP Cores; Hierarchical IP Core Generator for Quantum Fourier Transform Implementation in FPGA; Media IP Cores; Arithmetic and Mathematic Functions IP Cores. |
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